The plane layers of a printed circuit board (PCB), exhibit a parasitic capacitance because the positive voltage plane and ground plane layers are parallel to one another, forming a unintended capacitor. It's this capacitance that will sometimes be utilized during the design of an electronic circuit that requires capacitance, rather it be EMI/EMC reduction, or maybe the power source for fast switching digital integrated circuits. It's important for the design engineer to know this parasitic capacitor value before going forward with their PCB design, so they can optimize their circuit around this parasitic capacitance.
To be able to identify, and therefore change the embedded capacitance to the desired value, one must realize that as the plates of a capacitor gets closer together, the capacitance rises. This is also the case with PCBs and their plane layers. A design engineer may desire as much capacitance as possible embedded in the PCB, which requires a specific stackup of a PCB with the plane layers very close to one another, separated by the a very thin electrically insulated core material. However, these added specifications for the PCB stackup come at a premium charge when the PCB is fabricated, as opposed to a 'standard PCB', that has a stackup definition that caters to most of what the PCB fabrication houses send out to customers when they do not require a special stackup. Again, it's when you start to add special instructions for the PCB stackup, will you run in to cost premiums.
When using the default stackup from the fabrication house, you can still expect capacitance, but less of it due to the layers being further apart than a premium PCB would have. However, being able to identify the capacitance in these default stackups can prove valuable when working with this capacitance value.
A first look at a 1 inch x 1 inch standard 4 layer FR4, .062mil PCB that you will receive most of the time** after ordering (Figure 1), consists of a top and bottom layer thickness (the distance between the outer layers of copper) of 8mil, and an inner distance between the inner two planes of 40 mil. Using the inner layer for ground and power, you can expect about 26pF per square inch between these power and ground layers. This value was obtained with a copper weight on all layers of 1 ounce and two 10mil vias with 20 mil annular ring and 10 mil anti pad (these VIAs were directly in the center of the PCB with a separation of 50mil).
The following graph (Figure 2) show you what you would expect to see in the reduction of a 50 ohm noise source (One thing to note before going forward, is that the typical noise source you will see on a PCB will have a lower impedance. This impedance varies significantly as you add wider busses, more IC's and higher switching currents. The 50 ohm noise source was chosen here just for simplicity of explanation). The first thing you'll notice, is a -30dB notch around 800Mhz. This just happens to be an anomaly presented by the inductance of the Vias and the capacitance of the 1 inch PCB. You can test this yourself by calculating the resonant frequency of 26pF and about 1nH. One important thing to note, is that this notch frequency will only occur on a 1 inch x 1 inch PCB. The primary lesson to get out of this graph, is to realize that even in the 3GHz range, you can expect to see a -4dB reduction in noise.
Another approach toward embedded PCB capacitance is to use the the much closer layers (with the thin core of .008") on the bottom two layers for the ground and power plane layer, with the signal layers being on the top two layers. One would wonder if such a paradigm shift will enhance the usefulness of the embedded capacitance and yield more desirable results. Using this same standard 4 layer stackup as described above, but placing the ground plane on layer 4 (the bottom layer) and the power plane on layer 3 (next to bottom) we get about 130pF per sq. inch. Much better, but you now have to take into consideration you are now adding significant inductance in the form of VIAs before this larger embedded capacitance is reached. Not only this, but if you require specific trace impedances, your trace dimensions will grow substantially to maintain the desired value (which is beyond the scope of this article, yet still very important). You are also potentially creating "antennas" that will radiate even more EMI as the capacitance is much lower on signal traces (again beyond the scope of this article).
You can quickly see (Figure 3) that the new approach is actually a little worse. The lower degree of attenuation is attributed to the added inductance of the VIAs before they reach the power and ground planes. If one wanted to, they could use a very low frequency circuit to take advantage of the lower frequency notch as this notch would also become much lower and wider as the board grew in size. However, if you aiming for a product that will need to pass FCC radiated emissions, I recommend staying away from this all together unless you really know what your doing.
There is still one final trick up our sleeve that tries to maximize the benefits of embedded PCB capacitance. This is to use a non-standard PCB stackup, but still retaining a non-premium price tag for such a board***. This is done by using the same available thickness' that are common in a PCB fabrication house, but reordering the layers to place the two thin 8mil cores on top, and the 40mil core on bottom. This would give us 3 copper layers very close to one another near the top of the PCB, with one last copper layer on the very bottom, much further away ( using now the closer inner layers for power and ground but less inductance).
This graph (Figure 4) shows up what we would expect, an increase in performance for both the lower frequency notch, and the upper frequency attenuation. While the attenuation for 3GHz was -4dB on our first example, we now see about -8.5db attenuation. Much better. With a larger PCB, we would expect to see even greater attenuation, at the lower frequency notch filter, and even in the microwave bands.
Developing a quality PCB design that takes advantage of embedded plane capacitance doesn't have to be expensive. You can see that a notch filter can be designed-in for a particular frequency of choice, without even adding components to the bill of materials. Microwave noise as well as lower frequencies can be attenuated by utilizing methods often forgotten or misunderstood in the PCB design world.
**Depending on your PCB fabrication house, the core thickness', and therefore stackup, might vary from time to time for the 'non defined' orders, depending on what they have at that time. They may have an abundance of one thickness that they need to get out of stock, and they might run their orders a little off that month. It's always important, when working with embedded capacitance, to ask your fabrication house what the typical stackup is.
***At this point, if you were to specify such a stackup, I would recommend the option of simply using all 8 layer cores for a total PCB thickness of 37.6mil, instead of the standard 62mil stackup. This is because while the PCB fab house wont' charge a lot more for this stackup, they will still probably charge something, and in this case, it would be better to retain a thermally even layered PCB. What I mean by this, is that when you have an uneven stackup, it's possible to get warping during the component assembly process, as the metal expands and cools in the SMD ovens. it's still a possibility, you just have to get your PCB supplier and your manufacturing assembler on board to discuss it.
-Copyright (C) 2010 PCB Experts, LLC.